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 IRFP460N, SiHFP460N
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 124 40 57 Single
D
FEATURES
500 0.24
* Low Gate Charge Qg Results in Simple Drive Available Requirement * Improved Gate, Avalanche and Dynamic dV/dt RoHS* COMPLIANT Ruggedness * Fully Characterized Capacitance and Avalanche Voltage and Current * Effective Coss Specified * Lead (Pb)-free Available
TO-247
APPLICATIONS
* Switch Mode Power Supply (SMPS) * Uninterruptible Power Supply * High Speed Power Switching
G S D G S N-Channel MOSFET
TYPICAL SMPS TOPOLOGIES
* Full Bridge * Power Factor Correction Boost
ORDERING INFORMATION
Package Lead (Pb)-free SnPb TO-247 IRFP460NPbF SiHFP460N-E3 IRFP460N SiHFP460N
ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted
PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM Energyb LIMIT 500 30 20 13 80 2.2 EAS IAR EAR TC = 25 C PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw 340 20 28 280 5.0 - 55 to + 150 300d 10 1.1 W/C mJ A mJ W V/ns C lbf * in N*m A UNIT V
Linear Derating Factor Single Pulse Avalanche Repetitive Avalanche
Currenta
Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 1.8 mH, RG = 25 , IAS = 20 A (see fig. 12). c. ISD 20 A, dI/dt 140 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91236 S-Pending-Rev. B, 23-Jul-08 www.vishay.com 1
WORK-IN-PROGRESS
IRFP460N, SiHFP460N
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.24 MAX. 40 0.45 C/W UNIT
SPECIFICATIONS TJ = 25 C, unless otherwise noted
PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs
VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 mA VDS = VGS, ID = 250 A VGS = 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 12 Ab VDS = 50 V, ID = 12 A
500 3.0 10
580 -
5.0 100 25 250 0.24 -
V mV/C V nA A S
Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf
VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 400 V, f = 1.0 MHz VDS = 0 V to 400 Vc ID = 20 A, VDS = 400 V see fig. 6 and 13b
-
3540 350 30 3930 95 200 23 87 34 33
124 40 57 ns nC pF
VGS = 10 V
-
VDD = 250 V, ID = 20 A RG = 4.3 , RD= 13 , see fig. 10b
-
-
550 7.2
20 A 80 1.8 825 10.8 V ns C
G
S
TJ = 25 C, IS = 20 A, VGS = 0 Vb TJ = 25 C, IF = 20 A, dI/dt = 100 A/sb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
www.vishay.com 2
Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
100
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TJ = 150 C
10
10
1
TJ = 25 C
1
0.1
5.0V
0.01
0.001 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 5 6 7 8
V DS = 50V 20s PULSE WIDTH 9 10 11
VDS , Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
100
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
3.5 3.0 2.5 2.0 1.5 1.0 0.5
ID = 20A
10
1
5.0V
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
TJ , Junction Temperature ( C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
www.vishay.com 3
IRFP460N, SiHFP460N
Vishay Siliconix
100000
ISD , Reverse Drain Current (A)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
100
10000
TJ = 150 C
10
C, Capacitance(pF)
Ciss
1000
Coss
TJ = 25 C
1
100
Crss
10 1 10 100 1000
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VSD,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
ID = 20A VDS = 400V VDS = 250V VDS = 100V
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
VGS , Gate-to-Source Voltage (V)
16
12
ID, Drain-to-Source Current (A)
100
10
100sec 1msec
8
1 T A = 25C T J = 150C 0.1 Single Pulse 10 100 1000 10000 VDS , Drain-toSource Voltage (V) Fig. 8 - Maximum Safe Operating Area 10msec
4
0 0 20 40 60
FOR TEST CIRCUIT SEE FIGURE 13
80 100 120 140
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
www.vishay.com 4
Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
RD
VDS
20
VGS RG D.U.T.
+
ID , Drain Current (A)
15
10V
Pulse width 1 s Duty factor 0.1 %
- VDD
10
Fig. 10a - Switching Time Test Circuit
VDS 90 %
5
0 25 50 75 100 125 150
TC , Case Temperature ( C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
10 % VGS
t d(on) tr t d(off) t f
Fig. 10b - Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
V DS
15 V
tp
VDS
L
Driver
RG 20 V tp
D.U.T. IAS 0.01
+ A - VDD
A
I AS
Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5
IRFP460N, SiHFP460N
Vishay Siliconix
EAS , Single Pulse Avalanche Energy (mJ)
750
600
ID 8.9A 12.6A BOTTOM 20A TOP
450
300
150
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T.
QG
12 V 0.2 F
50 k 0.3 F
10 V
QGS VG
Q GD
D.U.T. VGS
3 mA
+ V - DS
Charge
IG
ID Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
www.vishay.com 6
Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer
+ +
-
RG
* * * *
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test
+ VDD
Driver gate drive P.W. Period D=
P.W. Period VGS = 10 V*
D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt
VDD
Re-applied voltage Inductor current
Body diode
forward drop
Ripple 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91236
Document Number: 91236 S-Pending-Rev. B, 23-Jul-08
www.vishay.com 7
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
www.vishay.com 1


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